\doxysection{SAI\+\_\+\+Type\+Def Struct Reference}
\hypertarget{struct_s_a_i___type_def}{}\label{struct_s_a_i___type_def}\index{SAI\_TypeDef@{SAI\_TypeDef}}


Serial Audio Interface.  




{\ttfamily \#include $<$stm32h723xx.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_a_i___type_def_ada6999b49bbe697c1dd5fdabc9bad7f4}{GCR}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_s_a_i___type_def_a498dfbc3a4535b4a70925c76d04f5911}{RESERVED0}} \mbox{[}16\mbox{]}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_a_i___type_def_a1dbd50df83666a4df00ca4cb62f7004e}{PDMCR}}
\item 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t \mbox{\hyperlink{struct_s_a_i___type_def_a473871502d2bb7579fc803f9502f7465}{PDMDLY}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
Serial Audio Interface. 

\label{doc-variable-members}
\Hypertarget{struct_s_a_i___type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_s_a_i___type_def_ada6999b49bbe697c1dd5fdabc9bad7f4}\index{SAI\_TypeDef@{SAI\_TypeDef}!GCR@{GCR}}
\index{GCR@{GCR}!SAI\_TypeDef@{SAI\_TypeDef}}
\doxysubsubsection{\texorpdfstring{GCR}{GCR}}
{\footnotesize\ttfamily \label{struct_s_a_i___type_def_ada6999b49bbe697c1dd5fdabc9bad7f4} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SAI\+\_\+\+Type\+Def\+::\+GCR}

SAI global configuration register, Address offset\+: 0x00 \Hypertarget{struct_s_a_i___type_def_a1dbd50df83666a4df00ca4cb62f7004e}\index{SAI\_TypeDef@{SAI\_TypeDef}!PDMCR@{PDMCR}}
\index{PDMCR@{PDMCR}!SAI\_TypeDef@{SAI\_TypeDef}}
\doxysubsubsection{\texorpdfstring{PDMCR}{PDMCR}}
{\footnotesize\ttfamily \label{struct_s_a_i___type_def_a1dbd50df83666a4df00ca4cb62f7004e} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SAI\+\_\+\+Type\+Def\+::\+PDMCR}

SAI PDM control register, Address offset\+: 0x44 \Hypertarget{struct_s_a_i___type_def_a473871502d2bb7579fc803f9502f7465}\index{SAI\_TypeDef@{SAI\_TypeDef}!PDMDLY@{PDMDLY}}
\index{PDMDLY@{PDMDLY}!SAI\_TypeDef@{SAI\_TypeDef}}
\doxysubsubsection{\texorpdfstring{PDMDLY}{PDMDLY}}
{\footnotesize\ttfamily \label{struct_s_a_i___type_def_a473871502d2bb7579fc803f9502f7465} 
\mbox{\hyperlink{core__armv81mml_8h_aec43007d9998a0a0e01faede4133d6be}{\+\_\+\+\_\+\+IO}} uint32\+\_\+t SAI\+\_\+\+Type\+Def\+::\+PDMDLY}

SAI PDM delay register, Address offset\+: 0x48 \Hypertarget{struct_s_a_i___type_def_a498dfbc3a4535b4a70925c76d04f5911}\index{SAI\_TypeDef@{SAI\_TypeDef}!RESERVED0@{RESERVED0}}
\index{RESERVED0@{RESERVED0}!SAI\_TypeDef@{SAI\_TypeDef}}
\doxysubsubsection{\texorpdfstring{RESERVED0}{RESERVED0}}
{\footnotesize\ttfamily \label{struct_s_a_i___type_def_a498dfbc3a4535b4a70925c76d04f5911} 
uint32\+\_\+t SAI\+\_\+\+Type\+Def\+::\+RESERVED0\mbox{[}16\mbox{]}}

Reserved, 0x04 -\/ 0x43 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+CMSIS/\+Device/\+ST/\+STM32\+H7xx/\+Include/\mbox{\hyperlink{stm32h723xx_8h}{stm32h723xx.\+h}}\end{DoxyCompactItemize}
